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.2byte expression [, expression]*.4byte expression [, expression]*.8byte expression [, expression]*.align expression [, expression].arch name.arm.bss.bss section.
.cantunwind.code [16|32] .dn register name [.type] [[index]] .qn register name [.type] [[index]]dn and qn directives are used to create typed
and/or indexed register aliases for use in Advanced SIMD Extension
(Neon) instructions. The former should be used to create aliases
of double-precision registers, and the latter to create aliases of
quad-precision registers.
If these directives are used to create typed aliases, those aliases can be used in Neon instructions instead of writing types after the mnemonic or after each operand. For example:
x .dn d2.f32
y .dn d3.f32
z .dn d4.f32[1]
vmul x,y,z
This is equivalent to writing the following:
vmul.f32 d2,d3,d4[1]
Aliases created using dn or qn can be destroyed using
unreq.
.cpu name.eabi_attribute tag, valuenumber, "string", or number, "string"
depending on the tag.
.even.extend expression [, expression]*.ldouble expression [, expression]*.unwind_fnendIf no personality routine has been specified then standard personality routine 0 or 1 will be used, depending on the number of unwind opcodes required.
.unwind_fnstart.force_thumb.fpu name.handlerdata.fnend directive will be added to the exception table entry.
Must be preceded by a .personality or .personalityindex
directive.
.ldouble expression [, expression]*.extend.
.ltorgGAS maintains a separate literal pool for each section and each
sub-section. The .ltorg directive will only affect the literal
pool of the current section and sub-section. At the end of assembly
all remaining, un-empty literal pools will automatically be dumped.
Note - older versions of GAS would dump the current literal
pool any time a section change occurred. This is no longer done, since
it prevents accurate control of the placement of literal pools.
.movsp reg [, #offset].object_arch name.arch directive.
Typically this is useful when code uses runtime detection of CPU features.
.packed expression [, expression]*.pad #count.personality name.personalityindex index.pool .req register namefoo .req r0
.save reglist
core registers
.save {r4, r5, r6, lr} stmfd sp!, {r4, r5, r6, lr}
FPA registers
.save f4, 2 sfmfd f4, 2, [sp]!
VFP registers
.save {d8, d9, d10} fstmdx sp!, {d8, d9, d10}
iWMMXt registers
.save {wr10, wr11} wstrd wr11, [sp, #-8]! wstrd wr10, [sp, #-8]! or .save wr11 wstrd wr11, [sp, #-8]! .save wr10 wstrd wr10, [sp, #-8]!
.setfp fpreg, spreg [, #offset]The syntax of this directive is the same as the sub or mov
instruction used to set the frame pointer. spreg must be either
sp or mentioned in a previous .movsp directive.
.movsp ip
mov ip, sp
...
.setfp fp, ip, #4
sub fp, ip, #4
.secrel32 expression [, expression]*.thumb.thumb_func.thumb
This directive is not neccessary when generating EABI objects. On these targets the encoding is implicit when generating Thumb code.
.thumb_set.set directive in that it
creates a symbol which is an alias for another symbol (possibly not yet
defined). This directive also has the added property in that it marks
the aliased symbol as being a thumb function entry point, in the same
way that the .thumb_func directive does.
.unreq alias-namereq, dn or qn directives. For example:
foo .req r0
.unreq foo
An error occurs if the name is undefined. Note - this pseudo op can be used to delete builtin in register name aliases (eg 'r0'). This should only be done if it is really necessary.
.raw offset, byte1, ...For example .unwind_raw 4, 0xb1, 0x01 is equivalent to
.save {r0}
.vsave vfp-reglist
VFP registers
.vsave {d8, d9, d10} fstmdd sp!, {d8, d9, d10}
VFPv3 registers
.vsave {d15, d16, d17} vstm sp!, {d15, d16, d17}
Since FLDMX and FSTMX are now deprecated, this directive should be
used in favour of .save for saving VFP registers for ARMv6 and above.