From George Smart's Wiki
Summer Internship 2009 : UCL Optics
This summer (Summer 2009) I am working for my university, University College London. The specification is to design an optical system to take gigabit ethernet into an FPGA and then serialise the data, send it over a 1.25Gb/s optical link to many clients. I will be designing two seperate systems. One will be impliemented in an telephone exchange type location, where there is a constant transmission of data. The other will be implimented at the client end, where the transmission mode is burst. Each client receives all data sent by the exchange, and acts only on the data addressed to it. The client waits for a frame from the exchange, identifying a timeslot for the client to uplink to the exchange. This process is time-divisision multiplexing.
- Once Dr Mitchell has ordered the optical tranceiver modules, I have to first put them onto a PCB and create a kind of evaluation board. This board will allow for easy access to IO of the tranceiver.
- To connect the previuosly created tranceiver development boards to the Maxim development boards. These boards will house the shift registers (serialisers/deserialisers) and associated logic.
- Finally, to connect the Maxim development boards to an FPGA (development board) and write some VHDL code to make the system work.
Having try to create the MAX3880, MAX3890 and MAX3886 schematic symbols in Easy-PC (Number One Systems), I was told that we would be using development boards. This made life much simplier, as Easy-PC did not look like it wanted to be used for sucn an ambitious task.
I am currently trying to learn VHDL. This is easier said than done. Really, I am waiting on the FPGA development board, so that I can begin wiring code - start off flashing some LEDs, I think!